Low temperature post-annealing of ZnO thin-film transistors with high-k gate dielectrics

Henry J.H. Chen, Barry B.L. Yeh, Wei Yang Chou

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)

摘要

This work addresses the thin film analysis of ZnO and electrical characteristics of ZnO TFTs with HfO2 high-k: gate dielectrics after low temperature post-annealing. The SIMS analysis shows that the diffusion of Zn atoms into the HTO2 will occur after 300 °C annealing and the related electrical characteristics indicates that the 200 °C annealing will be the optimized annealing condition for the ZnO/HfO2/ITO based TFTs. The ZnO TFTs after optimized annealing condition exhibited transistor behavior over the range 0-7 V; the field effect mobility, subthreshold slope and on/off ratio were measured to be 1.3 cm2V-1s-1, 0.5 V/decade and ∼106, respectively.

原文English
主出版物標題ECS Transactions - Thin Film Transistors 9, TFT 9
發行者Electrochemical Society Inc.
頁面315-322
頁數8
版本9
ISBN(列印)9781566776554
DOIs
出版狀態Published - 2009
事件Thin Film Transistors 9, TFT 9 - 214th ECS Meeting - Honolulu, HI, United States
持續時間: 2008 10月 132008 10月 16

出版系列

名字ECS Transactions
號碼9
16
ISSN(列印)1938-5862
ISSN(電子)1938-6737

Other

OtherThin Film Transistors 9, TFT 9 - 214th ECS Meeting
國家/地區United States
城市Honolulu, HI
期間08-10-1308-10-16

All Science Journal Classification (ASJC) codes

  • 一般工程

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