Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

Tsai Kan Chien; Lih Yih Chiou; Chieh Wen Cheng; Shyh Shyuan Sheu; Pei Hua Wang; Ming Jinn Tsai; Chih I. Wu

doi:10.1109/APCCAS.2016.7804003

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

Tsai Kan Chien, Lih Yih Chiou, Chieh Wen Cheng, Shyh Shyuan Sheu, Pei Hua Wang, Ming Jinn Tsai, Chih I. Wu

電機工程學系

研究成果: Conference contribution

2 引文斯高帕斯（Scopus）

摘要

In modern mobile devices, the CPU and GPU can jointly access one shared memory, typically consisting of only DRAM, by using heterogeneous uniform memory access (hUMA). This paper proposes an access algorithm, migration by data access tendency (MiDATE), for a hybrid main memory architecture consisting of resistive random access memory and DRAM. The MiDATE algorithm can operate on this hybrid memory architecture, reducing energy consumption by 83% while maintaining approximately the same speed as that of DRAM-only systems. Using the MiDATE algorithm can, on average, reduce unfairness by 36.5% compared with that of conventional hUMA methods, increasing system speed.

原文	English
主出版物標題	2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	461-464
頁數	4
ISBN（電子）	9781509015702
DOIs	https://doi.org/10.1109/APCCAS.2016.7804003
出版狀態	Published - 2017 1月 3
事件	2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of 持續時間: 2016 10月 25 → 2016 10月 28

出版系列

名字	2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

Other

Other	2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
國家/地區	Korea, Republic of
城市	Jeju
期間	16-10-25 → 16-10-28

All Science Journal Classification (ASJC) codes

電氣與電子工程
訊號處理

UN SDG

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10.1109/APCCAS.2016.7804003

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Chien, T. K., Chiou, L. Y., Cheng, C. W., Sheu, S. S., Wang, P. H., Tsai, M. J., & Wu, C. I. (2017). Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. 於 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 (頁 461-464). 文章 7804003 (2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2016.7804003

Chien, Tsai Kan ; Chiou, Lih Yih ; Cheng, Chieh Wen 等. / Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. 頁 461-464 (2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016).

@inproceedings{b0d0667e70b64cbbb198319b66950917,

title = "Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture",

abstract = "In modern mobile devices, the CPU and GPU can jointly access one shared memory, typically consisting of only DRAM, by using heterogeneous uniform memory access (hUMA). This paper proposes an access algorithm, migration by data access tendency (MiDATE), for a hybrid main memory architecture consisting of resistive random access memory and DRAM. The MiDATE algorithm can operate on this hybrid memory architecture, reducing energy consumption by 83% while maintaining approximately the same speed as that of DRAM-only systems. Using the MiDATE algorithm can, on average, reduce unfairness by 36.5% compared with that of conventional hUMA methods, increasing system speed.",

author = "Chien, {Tsai Kan} and Chiou, {Lih Yih} and Cheng, {Chieh Wen} and Sheu, {Shyh Shyuan} and Wang, {Pei Hua} and Tsai, {Ming Jinn} and Wu, {Chih I.}",

note = "Funding Information: The authors thank the Ministry of Science and Technology, Taiwan for the research grant that supported this work (MOST 104-2220-E-006-015) Publisher Copyright: {\textcopyright} 2016 IEEE.; 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 ; Conference date: 25-10-2016 Through 28-10-2016",

year = "2017",

month = jan,

day = "3",

doi = "10.1109/APCCAS.2016.7804003",

language = "English",

series = "2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "461--464",

booktitle = "2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016",

address = "United States",

}

Chien, TK, Chiou, LY, Cheng, CW, Sheu, SS, Wang, PH, Tsai, MJ & Wu, CI 2017, Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. 於 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016., 7804003, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Institute of Electrical and Electronics Engineers Inc., 頁 461-464, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, Korea, Republic of, 16-10-25. https://doi.org/10.1109/APCCAS.2016.7804003

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. / Chien, Tsai Kan; Chiou, Lih Yih; Cheng, Chieh Wen 等.
2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 461-464 7804003 (2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016).

研究成果: Conference contribution

TY - GEN

T1 - Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

AU - Chien, Tsai Kan

AU - Chiou, Lih Yih

AU - Cheng, Chieh Wen

AU - Sheu, Shyh Shyuan

AU - Wang, Pei Hua

AU - Tsai, Ming Jinn

AU - Wu, Chih I.

PY - 2017/1/3

Y1 - 2017/1/3

N2 - In modern mobile devices, the CPU and GPU can jointly access one shared memory, typically consisting of only DRAM, by using heterogeneous uniform memory access (hUMA). This paper proposes an access algorithm, migration by data access tendency (MiDATE), for a hybrid main memory architecture consisting of resistive random access memory and DRAM. The MiDATE algorithm can operate on this hybrid memory architecture, reducing energy consumption by 83% while maintaining approximately the same speed as that of DRAM-only systems. Using the MiDATE algorithm can, on average, reduce unfairness by 36.5% compared with that of conventional hUMA methods, increasing system speed.

AB - In modern mobile devices, the CPU and GPU can jointly access one shared memory, typically consisting of only DRAM, by using heterogeneous uniform memory access (hUMA). This paper proposes an access algorithm, migration by data access tendency (MiDATE), for a hybrid main memory architecture consisting of resistive random access memory and DRAM. The MiDATE algorithm can operate on this hybrid memory architecture, reducing energy consumption by 83% while maintaining approximately the same speed as that of DRAM-only systems. Using the MiDATE algorithm can, on average, reduce unfairness by 36.5% compared with that of conventional hUMA methods, increasing system speed.

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DO - 10.1109/APCCAS.2016.7804003

M3 - Conference contribution

AN - SCOPUS:85011092503

T3 - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

SP - 461

EP - 464

BT - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

Y2 - 25 October 2016 through 28 October 2016

ER -

Chien TK, Chiou LY, Cheng CW, Sheu SS, Wang PH, Tsai MJ 等. Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. 於 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 461-464. 7804003. (2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016). doi: 10.1109/APCCAS.2016.7804003

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

摘要

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All Science Journal Classification (ASJC) codes

UN SDG

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