Mismatch-aware common-centroid placement for arbitrary-ratio capacitor arrays considering dummy capacitors

Cheng Wu Lin, Jai Ming Lin, Yen Chih Chiu, Chun Po Huang, Soon Jyh Chang

研究成果: Article同行評審

29 引文 斯高帕斯(Scopus)

摘要

Switched capacitors are commonly used in analog circuits to increase the accuracy of analog signal processing and lower power consumption. To take full advantage of switched capacitors, it is very important to achieve accurate capacitance ratios in the layout of the capacitor arrays, which are affected by systematic and random mismatches. A good capacitor placement should have a common-centroid structure with the highest possible degree of dispersion to mitigate mismatches. Several dummy units should be inserted to make the placement shape more square and compact. This paper proposes a simulated-annealing-based approach for mismatch-aware common-centroid placement under the above constraints. A pair-sequence representation is used to record a placement, and a couple of associated operations are developed to find better solutions. The experimental results show that the proposed placements achieve smaller oxide-gradient-induced mismatch and larger overall correlation coefficients (i.e., higher degree of dispersion) than those of previous works.

原文English
文章編號6349434
頁(從 - 到)1789-1802
頁數14
期刊IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
31
發行號12
DOIs
出版狀態Published - 2012

All Science Journal Classification (ASJC) codes

  • 軟體
  • 電腦繪圖與電腦輔助設計
  • 電氣與電子工程

指紋

深入研究「Mismatch-aware common-centroid placement for arbitrary-ratio capacitor arrays considering dummy capacitors」主題。共同形成了獨特的指紋。

引用此