Mixed-Level Design Methodology for Digitally Controlled Power Converter IC

Yi Hua Chang, Kai Yu Hu, Guan Shen Yao, Chun Yu Chen, Chien-Hung Tsai

研究成果: Conference contribution

摘要

In this paper, a mixed-level design methodology for digitally controlled power converter IC is proposed. The proposed design methodology can reduce time for debugging and accelerate design period for digitally controlled power converter IC designers. With proper mixing of behavioral model, register-transfer level (RTL) model and transistor level model, the simulation can be more time effective without losing accuracy. The proposed design methodology is demonstrated with digital control voltage mode buck converter IC and the chip was manufactured by TSMC 0.18-mu textbfm CMOS process. The measurement results shows the consistent with simulation results. In addition, simulation time is much less than traditional design methodology.

原文English
主出版物標題2018 IEEE 7th Global Conference on Consumer Electronics, GCCE 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面276-277
頁數2
ISBN(電子)9781538663097
DOIs
出版狀態Published - 2018 十二月 12
事件7th IEEE Global Conference on Consumer Electronics, GCCE 2018 - Nara, Japan
持續時間: 2018 十月 92018 十月 12

出版系列

名字2018 IEEE 7th Global Conference on Consumer Electronics, GCCE 2018

Other

Other7th IEEE Global Conference on Consumer Electronics, GCCE 2018
國家Japan
城市Nara
期間18-10-0918-10-12

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Instrumentation

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