Multi-visit TAMs to reduce the post-bond test length of 2.5D-SICs with a passive silicon interposer base

Chun Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng Wen Wu

研究成果: Conference contribution

13 引文 斯高帕斯(Scopus)

摘要

2.5D Stacked ICs (2.5D-SICs) consist of multiple active dies (or 3D towers of active dies), which are placed side-by-side on top of and interconnected through a passive silicon interposer base which contains Through-Silicon Vias (TSVs). A previously presented post-bond test and Design-for-Test(DfT) strategy for such 2.5D-SICs implements a serial Test Access Mechanism (TAM) for interposer and micro-bump testing. In addition, it tries to identify an as-wide-as-possible set of functional interposer interconnects that can be reused as parallel TAMs to the various dies. In this paper, we extend that approach with the concept of Multi-Visit TAMs, i.e., parallel TAMs which are allowed to visit the same die more than once. For minimal additional hardware costs, the Multi-Visit TAMs succeed significantly more often in identifying a valid parallel TAM and achieve significantly lower test lengths.

原文English
主出版物標題Proceedings of the 20th Asian Test Symposium, ATS 2011
頁面451-456
頁數6
DOIs
出版狀態Published - 2011 十二月 1
事件20th Asian Test Symposium, ATS 2011 - New Delhi, India
持續時間: 2011 十一月 202011 十一月 23

出版系列

名字Proceedings of the Asian Test Symposium
ISSN(列印)1081-7735

Conference

Conference20th Asian Test Symposium, ATS 2011
國家/地區India
城市New Delhi
期間11-11-2011-11-23

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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