NetVP: A system-level NETwork Virtual Platform for network accelerator development

Chen Chieh Wang; Sheng Hsin Lo; Yao Ning Liu; Chung-Ho Chen

doi:10.1109/ISCAS.2012.6271806

NetVP: A system-level NETwork Virtual Platform for network accelerator development

Chen Chieh Wang, Sheng Hsin Lo, Yao Ning Liu, Chung-Ho Chen

電腦與通信工程研究所

研究成果: Paper › 同行評審

1 引文斯高帕斯（Scopus）

摘要

In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

原文	English
頁面	249-252
頁數	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271806
出版狀態	Published - 2012 9月 28
事件	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of 持續時間: 2012 5月 20 → 2012 5月 23

Other

Other	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
國家/地區	Korea, Republic of
城市	Seoul
期間	12-05-20 → 12-05-23

All Science Journal Classification (ASJC) codes

硬體和架構
電氣與電子工程

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10.1109/ISCAS.2012.6271806

其它文件與鏈接

引用此

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abstract = "In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.",

author = "Wang, {Chen Chieh} and Lo, {Sheng Hsin} and Liu, {Yao Ning} and Chung-Ho Chen",

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doi = "10.1109/ISCAS.2012.6271806",

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AU - Wang, Chen Chieh

AU - Lo, Sheng Hsin

AU - Liu, Yao Ning

AU - Chen, Chung-Ho

PY - 2012/9/28

Y1 - 2012/9/28

N2 - In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

AB - In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

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ER -

NetVP: A system-level NETwork Virtual Platform for network accelerator development

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