Novel vertical-stacked-array-transistor (VSAT) for ultra-high-density and cost-effective NAND flash memory devices and SSD (solid state drive)

Jiyoung Kim, Augustin J. Hong, Min Kim Sung, Emil B. Song, Hun Park Jeung, Jeonghee Han, Siyoung Choi, Deahyun Jang, Joo Tae Moon, Kang L. Wang

研究成果: Conference contribution

110 引文 斯高帕斯(Scopus)

摘要

A novel 3-D NAND Flash memory device, VSAT (Vertical-Stacked-Array- Transistor), has successfully been achieved. The VSAT was realized through a cost-effective and straightforward process called PIPE (Planarized-Integration- on-the-same-PlanE). The VSAT combined with PIPE forms a unique 3-D vertical integration method that may be exploited for ultra-high-density Flash memory chip and Solid-State-Drive (SSD) applications. The off-current level in the polysilicon-channel transistor dramatically decreases by five orders of magnitude by using an ultra-thin body of 20nm thick and a double-gate-in-series structure. In addition, hydrogen annealing improves the subthreshold swing and the mobility of the polysilicon-channel transistor.

原文English
主出版物標題2009 Symposium on VLSI Technology, VLSIT 2009
頁面186-187
頁數2
出版狀態Published - 2009
事件2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan
持續時間: 2009 6月 162009 6月 18

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
ISSN(列印)0743-1562

Conference

Conference2009 Symposium on VLSI Technology, VLSIT 2009
國家/地區Japan
城市Kyoto
期間09-06-1609-06-18

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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