NVMLearn: A simulation platform for non-volatile-memory-based deep learning hardware

Darsen D. Lu, Fu Xiang Liang, Yi Ci Wang, Huai Kuan Zeng

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

Hardware implementation of deep machine learning using the convolutional neural network has been successfully demonstrated using array architecture with non-volatile storage elements such as floating-gate MOS transistor, resistive memory, phase change memory, etc. We present a new simulation platform, NVMLearn, to aid the design, verification, and system-level power and performance estimation for such architecture. Physical characteristics of memory devices are modeled using Verilog-A compact models, which can be easily simulated in SPICE to obtain the device programming, erasure, and read behavior. On the system level, NVMLearn simulates the training of the entire convolutional network based on any non-volatile memory device type.

原文English
主出版物標題Proceedings of the 2017 IEEE International Conference on Applied System Innovation
主出版物子標題Applied System Innovation for Modern Technology, ICASI 2017
編輯Teen-Hang Meen, Artde Donald Kin-Tak Lam, Stephen D. Prior
發行者Institute of Electrical and Electronics Engineers Inc.
頁面66-69
頁數4
ISBN(電子)9781509048977
DOIs
出版狀態Published - 2017 7月 21
事件2017 IEEE International Conference on Applied System Innovation, ICASI 2017 - Sapporo, Japan
持續時間: 2017 5月 132017 5月 17

出版系列

名字Proceedings of the 2017 IEEE International Conference on Applied System Innovation: Applied System Innovation for Modern Technology, ICASI 2017

Other

Other2017 IEEE International Conference on Applied System Innovation, ICASI 2017
國家/地區Japan
城市Sapporo
期間17-05-1317-05-17

All Science Journal Classification (ASJC) codes

  • 電腦網路與通信
  • 電腦科學應用
  • 硬體和架構
  • 安全、風險、可靠性和品質
  • 機械工業
  • 媒體技術
  • 健康資訊學
  • 儀器

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