On test and repair of 3D random access memory

Cheng Wen Wu; Shyue Kun Lu; Jin Fu Li

doi:10.1109/ASPDAC.2012.6165054

On test and repair of 3D random access memory

Cheng Wen Wu, Shyue Kun Lu, Jin Fu Li

電機工程學系

研究成果: Conference contribution

13 引文斯高帕斯（Scopus）

摘要

The three-dimensional (3D) random access memory (RAM) using through-silicon via (TSV) has been considered as a promising approach to overcome the memory wall. However, cost and yield are two key issues for volume production of 3D RAMs, and yield enhancement increasingly requires test techniques. In this paper, we first introduce issues and existing techniques for the testing and yield enhancement of 3D RAMs. Then, a built-in self-repair (BISR) technique for 3D RAM using global redundancy is presented. According to the redundancy analysis results of each die with the BISR circuit, the die-to-die (d2d) and wafer-to-wafer (w2w) stacking problems are transferred to the bipartite maximal matching problem. Then, heuristic algorithms are also proposed to optimize the stacking yield.

原文	English
主出版物標題	ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference
頁面	744-749
頁數	6
DOIs	https://doi.org/10.1109/ASPDAC.2012.6165054
出版狀態	Published - 2012 4月 26
事件	17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012 - Sydney, NSW, Australia 持續時間: 2012 1月 30 → 2012 2月 2

出版系列

名字	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012
國家/地區	Australia
城市	Sydney, NSW
期間	12-01-30 → 12-02-02

All Science Journal Classification (ASJC) codes

電腦科學應用
電腦繪圖與電腦輔助設計
電氣與電子工程

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10.1109/ASPDAC.2012.6165054

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@inproceedings{55c1268091dc40758ee2aa881a8b88b7,

title = "On test and repair of 3D random access memory",

abstract = "The three-dimensional (3D) random access memory (RAM) using through-silicon via (TSV) has been considered as a promising approach to overcome the memory wall. However, cost and yield are two key issues for volume production of 3D RAMs, and yield enhancement increasingly requires test techniques. In this paper, we first introduce issues and existing techniques for the testing and yield enhancement of 3D RAMs. Then, a built-in self-repair (BISR) technique for 3D RAM using global redundancy is presented. According to the redundancy analysis results of each die with the BISR circuit, the die-to-die (d2d) and wafer-to-wafer (w2w) stacking problems are transferred to the bipartite maximal matching problem. Then, heuristic algorithms are also proposed to optimize the stacking yield.",

author = "Wu, {Cheng Wen} and Lu, {Shyue Kun} and Li, {Jin Fu}",

year = "2012",

month = apr,

day = "26",

doi = "10.1109/ASPDAC.2012.6165054",

language = "English",

isbn = "9781467307727",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

pages = "744--749",

booktitle = "ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference",

note = "17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012 ; Conference date: 30-01-2012 Through 02-02-2012",

}

Wu, CW, Lu, SK & Li, JF 2012, On test and repair of 3D random access memory. 於 ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference., 6165054, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 頁 744-749, 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, NSW, Australia, 12-01-30. https://doi.org/10.1109/ASPDAC.2012.6165054

TY - GEN

T1 - On test and repair of 3D random access memory

AU - Wu, Cheng Wen

AU - Lu, Shyue Kun

AU - Li, Jin Fu

PY - 2012/4/26

Y1 - 2012/4/26

N2 - The three-dimensional (3D) random access memory (RAM) using through-silicon via (TSV) has been considered as a promising approach to overcome the memory wall. However, cost and yield are two key issues for volume production of 3D RAMs, and yield enhancement increasingly requires test techniques. In this paper, we first introduce issues and existing techniques for the testing and yield enhancement of 3D RAMs. Then, a built-in self-repair (BISR) technique for 3D RAM using global redundancy is presented. According to the redundancy analysis results of each die with the BISR circuit, the die-to-die (d2d) and wafer-to-wafer (w2w) stacking problems are transferred to the bipartite maximal matching problem. Then, heuristic algorithms are also proposed to optimize the stacking yield.

AB - The three-dimensional (3D) random access memory (RAM) using through-silicon via (TSV) has been considered as a promising approach to overcome the memory wall. However, cost and yield are two key issues for volume production of 3D RAMs, and yield enhancement increasingly requires test techniques. In this paper, we first introduce issues and existing techniques for the testing and yield enhancement of 3D RAMs. Then, a built-in self-repair (BISR) technique for 3D RAM using global redundancy is presented. According to the redundancy analysis results of each die with the BISR circuit, the die-to-die (d2d) and wafer-to-wafer (w2w) stacking problems are transferred to the bipartite maximal matching problem. Then, heuristic algorithms are also proposed to optimize the stacking yield.

UR - http://www.scopus.com/inward/record.url?scp=84859939823&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84859939823&partnerID=8YFLogxK

U2 - 10.1109/ASPDAC.2012.6165054

DO - 10.1109/ASPDAC.2012.6165054

M3 - Conference contribution

AN - SCOPUS:84859939823

SN - 9781467307727

T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

SP - 744

EP - 749

BT - ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference

T2 - 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012

Y2 - 30 January 2012 through 2 February 2012

ER -

On test and repair of 3D random access memory

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All Science Journal Classification (ASJC) codes

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