On the verification of multi-standard SOC's for reconfigurable video coding based on algorithm/architecture co-exploration

Gwo Giun Lee, He Yuan Lin, Ming Jiun Wang, Bo Han Chen, Yuan Long Cheng

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

Based on concurrent exploration of both algorithm and architecture, this paper introduces an efficient verification methodology that targets at comprehensive functional verification throughout different levels of design granularities for multi-format media SoC's with applications in MPEG's Reconfigurable Video Coding. We present a verification technique that minimizes the number of test patterns but at the same time covering multiple profiles based on the functional commonalities extracted from multiple coding standards. In addition, algorithmic complexity analysis and dataflow modeling are also used to gain insight into flexible video architecture at early design stage in facilitating more efficient verification environment. Furthermore, an isolation technique is also presented for independent verification of coarse grain modules in the system level. We have shown that this verification methodology can effectively enhance the reliability and efficiency of SoC's with high complexity and reconfigurability.

原文English
主出版物標題2008 IEEE Workshop on Signal Processing Systems, SiPS 2008, Proceedings
頁面170-175
頁數6
DOIs
出版狀態Published - 2008 十二月 26
事件2008 IEEE Workshop on Signal Processing Systems, SiPS 2008 - Washington, DC, United States
持續時間: 2008 十月 82008 十月 10

出版系列

名字IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN(列印)1520-6130

Other

Other2008 IEEE Workshop on Signal Processing Systems, SiPS 2008
國家/地區United States
城市Washington, DC
期間08-10-0808-10-10

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程
  • 訊號處理
  • 應用數學
  • 硬體和架構

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