TY - GEN
T1 - On the verification of multi-standard SOC's for reconfigurable video coding based on algorithm/architecture co-exploration
AU - Lee, Gwo Giun
AU - Lin, He Yuan
AU - Wang, Ming Jiun
AU - Chen, Bo Han
AU - Cheng, Yuan Long
PY - 2008
Y1 - 2008
N2 - Based on concurrent exploration of both algorithm and architecture, this paper introduces an efficient verification methodology that targets at comprehensive functional verification throughout different levels of design granularities for multi-format media SoC's with applications in MPEG's Reconfigurable Video Coding. We present a verification technique that minimizes the number of test patterns but at the same time covering multiple profiles based on the functional commonalities extracted from multiple coding standards. In addition, algorithmic complexity analysis and dataflow modeling are also used to gain insight into flexible video architecture at early design stage in facilitating more efficient verification environment. Furthermore, an isolation technique is also presented for independent verification of coarse grain modules in the system level. We have shown that this verification methodology can effectively enhance the reliability and efficiency of SoC's with high complexity and reconfigurability.
AB - Based on concurrent exploration of both algorithm and architecture, this paper introduces an efficient verification methodology that targets at comprehensive functional verification throughout different levels of design granularities for multi-format media SoC's with applications in MPEG's Reconfigurable Video Coding. We present a verification technique that minimizes the number of test patterns but at the same time covering multiple profiles based on the functional commonalities extracted from multiple coding standards. In addition, algorithmic complexity analysis and dataflow modeling are also used to gain insight into flexible video architecture at early design stage in facilitating more efficient verification environment. Furthermore, an isolation technique is also presented for independent verification of coarse grain modules in the system level. We have shown that this verification methodology can effectively enhance the reliability and efficiency of SoC's with high complexity and reconfigurability.
UR - http://www.scopus.com/inward/record.url?scp=57849119281&partnerID=8YFLogxK
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U2 - 10.1109/SIPS.2008.4671757
DO - 10.1109/SIPS.2008.4671757
M3 - Conference contribution
AN - SCOPUS:57849119281
SN - 9781424429240
T3 - IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
SP - 170
EP - 175
BT - 2008 IEEE Workshop on Signal Processing Systems, SiPS 2008, Proceedings
T2 - 2008 IEEE Workshop on Signal Processing Systems, SiPS 2008
Y2 - 8 October 2008 through 10 October 2008
ER -