One-dimensional approach for floating field limiting ring enhanced high-voltage power transistor design

A new analytic method that combines models of a plane junction in bulk and a cylindrical junction at a surface, is proposed. From this analysis, the optimal space between the base junction and the floating field limiting ring of a power transistor are obtained. The influences of the concentration and thickness of a lightly doped collector layer, the base junction depth and the applied voltage on the optimal space are also discussed. The deviation between the results obtained from this model and two-dimensional numerical solutions is within 5%. Experimental results obtained using high-voltage power transistors based on this approach are in agreement with theoretical predictions.