P-MOSFET and n-MOSFET Prepared by ICP-Assisted Hot Wire Implantation Doping Technique

Y. H. Chen; S. J. Chang; C. J. Wu; T. J. Hsueh

doi:10.1109/LED.2016.2554144

P-MOSFET and n-MOSFET Prepared by ICP-Assisted Hot Wire Implantation Doping Technique

Y. H. Chen, S. J. Chang, C. J. Wu, T. J. Hsueh

研究成果: Article › 同行評審

摘要

In this letter, p-type and n-type metal-oxide- semiconductor field-effect transistors (MOSFETs) were fabricated using an inductively coupled plasma-assisted hot wire implantation doping technique. A complementary metal-oxide- semiconductor (CMOS) device that combines p- and n-MOSFETs was also fabricated. The obtained junction depth of the p-MOSFETs was ~ 45 nm. The subthreshold slope and ON-OFF current ratio of the p-MOSFET were ~0.18 V/decade and over 10⁴, respectively. The measurements made of the CMOS device show that it is a good inverter.

原文	English
文章編號	7452555
頁（從 - 到）	698-700
頁數	3
期刊	IEEE Electron Device Letters
卷	37
發行號	6
DOIs	https://doi.org/10.1109/LED.2016.2554144
出版狀態	Published - 2016 6月

All Science Journal Classification (ASJC) codes

電子、光磁材料
電氣與電子工程

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10.1109/LED.2016.2554144

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title = "P-MOSFET and n-MOSFET Prepared by ICP-Assisted Hot Wire Implantation Doping Technique",

abstract = "In this letter, p-type and n-type metal-oxide- semiconductor field-effect transistors (MOSFETs) were fabricated using an inductively coupled plasma-assisted hot wire implantation doping technique. A complementary metal-oxide- semiconductor (CMOS) device that combines p- and n-MOSFETs was also fabricated. The obtained junction depth of the p-MOSFETs was ~ 45 nm. The subthreshold slope and ON-OFF current ratio of the p-MOSFET were ~0.18 V/decade and over 104, respectively. The measurements made of the CMOS device show that it is a good inverter.",

author = "Chen, {Y. H.} and Chang, {S. J.} and Wu, {C. J.} and Hsueh, {T. J.}",

note = "Funding Information: This work was supported in part by the Ministry of Science and Technology, Taiwan, under Grant 103-2221-E-492-047-MY3, and in part by National Nano Devices Laboratories, Tainan, Taiwan. Publisher Copyright: {\textcopyright} 1980-2012 IEEE.",

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AU - Hsueh, T. J.

N1 - Funding Information: This work was supported in part by the Ministry of Science and Technology, Taiwan, under Grant 103-2221-E-492-047-MY3, and in part by National Nano Devices Laboratories, Tainan, Taiwan. Publisher Copyright: © 1980-2012 IEEE.

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N2 - In this letter, p-type and n-type metal-oxide- semiconductor field-effect transistors (MOSFETs) were fabricated using an inductively coupled plasma-assisted hot wire implantation doping technique. A complementary metal-oxide- semiconductor (CMOS) device that combines p- and n-MOSFETs was also fabricated. The obtained junction depth of the p-MOSFETs was ~ 45 nm. The subthreshold slope and ON-OFF current ratio of the p-MOSFET were ~0.18 V/decade and over 104, respectively. The measurements made of the CMOS device show that it is a good inverter.

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P-MOSFET and n-MOSFET Prepared by ICP-Assisted Hot Wire Implantation Doping Technique

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