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P-type delta-doped SiGe/Si heterostructure field effect transistors

  • P. W. Chien
  • , S. L. Wu
  • , S. C. Lee
  • , S. J. Chang
  • , H. Miura
  • , S. Koh
  • , Y. Shiraki

研究成果: Article同行評審

2   連結會在新分頁中開啟 引文 斯高帕斯(Scopus)

摘要

P-type SiGe/Si HFETs with different position of the δ-doped layer in the SiGe channel are reported for the first time. For the same device structure with a 1 × 100 μm 2 gate, bottom-delta-doped-channel devices display a wide and flat range of uniform g m distribution of 1.4 V, and 0.9 V in top-delta-doped-channel devices. Compared to the latter devices, a high gate-to-drain breakdown voltage (>25 V) due to a better carrier confinement together with a higher current density for the bottom-delta-doped-channel devices was obtained at room temperature, which is expected to provide an additional degree of freedom for Si-based device applications.

原文English
頁(從 - 到)1289-1291
頁數3
期刊Electronics Letters
38
發行號21
DOIs
出版狀態Published - 2002 10月 10

UN SDG

此研究成果有助於以下永續發展目標

  1. SDG 7 - 經濟實惠的清潔能源
    SDG 7 經濟實惠的清潔能源

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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