Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system

Ying Xun Lai, Yueh Min Huang, Chin Feng Lai, Ljiljana Trajkovic

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)

摘要

Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS) may be used for simpler calculations in order to decrease the system voltage or frequency and achieve lower power consumption. Combining these two mechanisms may lead to higher efficiency and lower power consumption. In this paper, we introduce a parallel decoding process with Digital Signal Processing (DSP) for power efficiency in a heterogeneous multi-core embedded system. We describe a parallel low-power design on the system level. Under the condition of preserving the original decoding process, we manage the size of the system's multimedia buffer by considering the spontaneous streaming transfer and tuning the decoding process scheduling time by using the DVFS system in order to decrease the multimedia data dependency and achieve a multi-core embedded system with accurate and low-power detection mechanism.

原文English
主出版物標題2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
頁面1956-1959
頁數4
DOIs
出版狀態Published - 2011 八月 2
事件2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 - Rio de Janeiro, Brazil
持續時間: 2011 五月 152011 五月 18

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Other

Other2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
國家Brazil
城市Rio de Janeiro
期間11-05-1511-05-18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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