This paper considers discrete time analyses of first- and second-order digital delay lock loops (DDLL), and presents the results of an investigation concerning the performance degradation due to Doppler. The performance measures evaluated include the steady-state timing error probability density function (pdf) and the mean time to lost lock. The measures are characterized in terms of the Doppler shift and the loop signal-to-noise ratio. Moreover, approximate expressions for the steady-state timing error probability density and the mean time to lose lock are also presented for the first- and second-order digital delay lock loops. The analyses are confirmed by numerical results and simulation.
|出版狀態||Published - 1995 一月 1|
|事件||Proceedings of the 1995 IEEE International Conference on Communications. Part 1 (of 3) - Seattle, WA, USA|
持續時間: 1995 六月 18 → 1995 六月 22
|Other||Proceedings of the 1995 IEEE International Conference on Communications. Part 1 (of 3)|
|城市||Seattle, WA, USA|
|期間||95-06-18 → 95-06-22|
All Science Journal Classification (ASJC) codes