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Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs
Po Chih Chen
, Yi Ting Wu
,
Meng Hsueh Chiang
奈米積體電路工程博士學位學程
研究成果
:
Conference contribution
1
引文 斯高帕斯(Scopus)
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Keyphrases
Pullout
100%
Silicon-on-insulator
100%
Bulk FinFET
100%
Performance Comparison
100%
Static Random Access Memory
100%
Memory Design
100%
Nanosheet Transistor
100%
Pass Gate
62%
Transistor
50%
NSFET
50%
Read Static Noise Margin
25%
Silicon Substrate
12%
Insulator Substrate
12%
Drive Current
12%
Punch-through
12%
Channel Width
12%
Gate-all-around
12%
Fin Field-effect Transistor (FinFET)
12%
2-design
12%
TFET SRAMs
12%
Processing Node
12%
Device Layout
12%
Width Ratio
12%
High Drive
12%
Stopper
12%
Bulk Silicon
12%
Write Access Time
12%
Engineering
Silicon on Insulator
100%
Random Access Memory
100%
Nanosheet
100%
Current Drive
33%
Nodes
16%
Silicon Substrate
16%
Conductive
16%
Noise Margin
16%
Access Time
16%
Computer Science
Performance Comparison
100%
Memory Design
100%
Static Random Access Memory
100%
Noise Margin
16%
And Gate
16%
Silicon Substrate
16%
Material Science
Silicon
100%
Transistor
100%
Nanosheet
100%
Biochemistry, Genetics and Molecular Biology
Drive
100%