Power MISFETs fabricated with superlatticed gate "insulators" and transition buffer layers

Wen Chau Liu, Wen Shiung Lour

研究成果: Article同行評審

9 引文 斯高帕斯(Scopus)

摘要

A new GaAs MISFET with superlatticed gate "insulator" and transition buffer layer structure is proposed in this paper. The use of an undoped GaAsAl0.3Ga0.7As superlatticed gate "insulator" provides a high gate breakdown voltage ( > 36 V) with very low prebreakdown leakage current and a low gate capacitance (Cgs), compared to usual MESFET devices. Due to the existence of the gate "insulator", a high carrier concentration can be employed in the active channel, which improves the outer-drain-current capability and transconductance (over 200 mS/mm can be expected if the gate length is reduced to 1 μm). Also three different transition-buffer layers i.e. superlattice, graded superlattice and modulation-doped (MD) structures have been inserted between the active-channel and buffer layer respectively, to offer an excellent carrier confinement (to obtain a small interface degraded region) or to enhance the electrical performance of the active channel. Finally, the IV characteristics, output conductance and transconductance gm of the superlatticed gate FETs with different transition-buffer layers are investigated and compared. From the experimental results, it is clear that the proposed structures are suitable for power application.

原文English
頁(從 - 到)1019-1024
頁數6
期刊Solid State Electronics
33
發行號8
DOIs
出版狀態Published - 1990 八月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

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