Realisation of morphological operations

Chin-Hsing Chen, D. L. Yang

研究成果: Article同行評審

7 引文 斯高帕斯(Scopus)

摘要

Multi-inputs min and max operators are two essential components for dilation and erosion, which are two basic building units for morphological filtering. Many of the more complicated operations of morphological filtering can be decomposed by them. The min or max operator cascades after a bit-serial adder or subtractor is equal to a dilation or erosion operator. In the paper, an efficient algorithm and its implementation architecture for the min/max operation are proposed. The proposed algorithm and architecture can process bit by bit directly for all input signals without using threshold decomposition which requires more complicated hardware design. Any shape and size of the filtering window or structuring element can be realised. For a fixed window size, the shape of window is programmable by changing some input initial conditions. The computation time is independent of, and the hardware complexity is linear to, the window size. This implies that a very high throughput rate can be attained after an initial latency period required to fill up the pipeline. The proposed architecture is modular, regular and of local interconnections; and therefore amenable for VLSI implementation.

原文English
頁(從 - 到)364-368
頁數5
期刊IEE Proceedings: Circuits, Devices and Systems
142
發行號6
DOIs
出版狀態Published - 1995 十二月 1

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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