Reconstituted Wafer Deformation Analysis through Whole Process Emulation

研究成果: Article同行評審

8 引文 斯高帕斯(Scopus)


Wafer reconstitution is a vital process for serving as a buffer to decouple the processing developments between IC fabrication and packaging. Through this approach, the IC packaging is then independent from the chip processing. However, such a process brings numerous mechanical and thermal loadings during molding and curing phases and this directly causes serious wafer warpage on the reconstituted wafer and imposes additional difficulties in subsequent processing. In this work, a global investigation on both fluid and thermo-mechanical analysis issues is firstly presented for addressing the observed die-shift and wafer warpage for finding the dominated factors and some preliminary results are presented. Furthermore, the key factor for affecting the reconstituted wafer warpage is analyzed by performing solid thermo-mechanical analyses through emulating the entire process. Specifically, to have a deeper insight, essentially material characterizations are performed to serve as the foundation for subsequent thermo-mechanical analyses and simplified 2D and detailed 3D finite element analyses have been constructed to mimic the entire reconstitution process. Detail thermo-mechanical processing steps are then emulated by these finite element models. After validation, systematic parametric studies are then performed to investigate the controlling factors for dominating wafer warpages. The simulation results indicated that the thermal expansion coefficients and the Young's modulus of molding compounds could be the dominated factor. It is estimated that by choosing compounds with more desirable above-mentioned mechanical properties, it is expected that a 20 to 30 percentage reduction of warpage can be achieved.

頁(從 - 到)172-180
期刊IEEE Transactions on Device and Materials Reliability
出版狀態Published - 2020 3月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 安全、風險、可靠性和品質
  • 電氣與電子工程


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