RF and logic performance improvement of In0.7Ga0.3 As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology

Chien I. Kuo, Heng Tung Hsu, Edward Yi Chang, Chia Yuan Chang, Yasuyuki Miyamoto, Suman Datta, Marko Radosavljevic, Guo Wei Huang, Ching Ting Lee

研究成果: Article同行評審

28 引文 斯高帕斯(Scopus)

摘要

Eighty-nanometer-gate In0.7Ga0.3As/InAs/ In0.7Ga0.3As composite-channel high-electron mobility transistors (HEMTs), which are fabricated using platinum buried gate as the Schottky contact metal, were evaluated for RF and logic application. After gate sinking at 250 °C for 3 min, the device exhibited a high gm value of 1590 mS/mm at Vd = 0.5 V, the current-gain cutoff frequency fT was increased from 390 to 494 GHz, and the gate-delay time was decreased from 0.83 to 0.78 ps at supply voltage of 0.6 V. This is the highest fT achieved for 80-nm-gate-length HEMT devices. These superior performances are attributed to the reduction of distance between gate and channel and the reduction of parasitic gate capacitances during the gate-sinking process. Moreover, such superior performances were achieved through a very simple and straightforward fabrication process with optimal epistructure of the device.

原文English
頁(從 - 到)290-293
頁數4
期刊IEEE Electron Device Letters
29
發行號4
DOIs
出版狀態Published - 2008 四月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 電氣與電子工程

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