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Robust Binary Neural Network Operation from 233 K to 398 K via Gate Stack and Bias Optimization of Ferroelectric FinFET Synapses

  • Sourav De
  • , Hoang Hiep Le
  • , Bo Han Qiu
  • , Md Aftab Baig
  • , Po Jung Sung
  • , Chun Jung Su
  • , Yao Jen Lee
  • , Darsen D. Lu

研究成果: Article同行評審

26   連結會在新分頁中開啟 引文 斯高帕斯(Scopus)

摘要

A synergistic approach for optimizing devices, circuits, and neural network architectures was used to abate junction-temperature-change-induced performance degradation of an Fe-FinFET-based artificial neural network. We demonstrated that the digital nature of the binarized neural network, with the '0' state programmed deep in the subthreshold and the '1' state in strong inversion, is crucial for robust deep neural network inference. The performance of a purely software-based binary neural network (BNN), with 96.1% accuracy for Modified National Institute of Standards and Technology (MNIST) handwritten digit recognition, was used as a baseline. The Fe-FinFET-based BNN (including device-to-device variation at 300 K) achieved 95.7% inference accuracy on the MNIST dataset. Although substantial inference accuracy degradation with temperature change was observed in a nonbinary neural network, the BNN with optimized Fe-FinFETs as synaptic devices had excellent resistance to temperature change effects, and maintained a minimum inference accuracy of 95.2% within a temperature range of -40 to 125 °C after gate stack and bias optimization. However, reprogramming to adjust device conductance was necessary for temperatures higher than 125 °C.

原文English
文章編號9455832
頁(從 - 到)1144-1147
頁數4
期刊IEEE Electron Device Letters
42
發行號8
DOIs
出版狀態Published - 2021 8月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 電氣與電子工程

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