RRAM-based neuromorphic hardware reliability improvement by self-healing and error correction

Jia Yun Hu, Kuan Wei Hou, Chih Yen Lo, Yung Fa Chou, Cheng Wen Wu

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)

摘要

Neural network (NN) has been considered as an important factor for the success of many AI applications. As the von Neumann architecture is inefficient for NN computation, researchers have been investigating new semiconductor devices and architectures for neuromorphic computing. The crossbar RRAM, which is an emerging non-volatile memory composed of memristor devices, can be used to accelerate or emulate the NN computation. However, the memristor device defects exposed during manufacturing or field use may cause performance degradation in the NN, causing reliability issues to the neuromorphic hardware. In this paper, we consider two existing fault models for the 1T1R RRAM cell, i.e., the stuck-at fault and transistor stuck-on fault. Evaluation of their influence to the NN shows that for about 10% faulty cells in the memristor array, the accuracy for the MLP model degrades about 10%, and that for the LeNet 300-100 and LeNet 5 degrades by more than 65%. Therefore, we propose a self-healing and an error correction approach to reduce the accuracy degradation, and improve the reliability (lifetime) of the neuromorphic hardware. Our simulation results show that if we limit the accuracy degradation to within 5%, then the proposed error correction approach for the MLP model will be able to tolerate up to 40% faulty cells, and even up to 60% faulty cells for LeNet 300-100 and LetNet 5 models. Also, the error correction method can extend the lifetime of the neuromorphic hardware by 5% or more.

原文English
主出版物標題Proceedings - 2nd IEEE International Test Conference in Asia, ITC-Asia 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面19-24
頁數6
ISBN(列印)9781538651803
DOIs
出版狀態Published - 2018 九月 11
事件2nd IEEE International Test Conference in Asia, ITC-Asia 2018 - Harbin, China
持續時間: 2018 八月 152018 八月 17

出版系列

名字Proceedings - 2nd IEEE International Test Conference in Asia, ITC-Asia 2018

Other

Other2nd IEEE International Test Conference in Asia, ITC-Asia 2018
國家China
城市Harbin
期間18-08-1518-08-17

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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