S-shaped gate-all-around MOSFETs for high density design

研究成果: Conference contribution

摘要

For maximum utilization of layout area using the vertical gate-all-around (VGAA) MOSFETs, this paper proposes a new S-shaped GAA (SGAA) MOSFET structure for 3D integration. The proposed approach improves the layout density per unit cell to extend Moore's Law without the need of aggressive technology scaling. By adjusting the dimensional parameters in the layout schematic, we can tune the device performance such as drive current easily, thus providing a circuit design flexibility for SoC application. Using the same effective channel width for comparison with others vertical GAA structures, the proposed one gives an advantage in better short-channel effects based on three-dimensional TCAD simulation. In addition, by interlacing SGAAs in a repeated unit cell configuration for high density design, just like multi-finger layout, the area density is increased by 3.3× as compared with the ring-shaped GAA MOSFET.

原文English
主出版物標題Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings
編輯Androula G. Nassiopoulou, Panagiotis Sarafis
發行者Institute of Electrical and Electronics Engineers Inc.
頁面160-163
頁數4
ISBN(電子)9781509053131
DOIs
出版狀態Published - 2017 六月 29
事件2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Athens, Greece
持續時間: 2017 四月 32017 四月 5

出版系列

名字Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings

Other

Other2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017
國家Greece
城市Athens
期間17-04-0317-04-05

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Instrumentation
  • Electrical and Electronic Engineering

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  • 引用此

    Huang, Y. C., Wang, S. J., & Chiang, M. H. (2017). S-shaped gate-all-around MOSFETs for high density design. 於 A. G. Nassiopoulou, & P. Sarafis (編輯), Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings (頁 160-163). [7962566] (Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ULIS.2017.7962566