segmented analog-to-digital converter and method thereof

Soon-Jyh Chang

segmented analog-to-digital converter and method thereof

貢獻的翻譯標題: 分段式類比數位轉換器及其方法

Soon-Jyh Chang (Inventor)

電機工程學系

研究成果: Patent

摘要

The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC).

貢獻的翻譯標題	分段式類比數位轉換器及其方法
原文	English
專利號	8310388
出版狀態	Published - 2012 6月 21

引用此

@misc{552bbb17c9fd47b887dd6cedfeca6beb,

title = "segmented analog-to-digital converter and method thereof",

abstract = "The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC).",

author = "Soon-Jyh Chang",

year = "2012",

month = jun,

day = "21",

language = "English",

type = "Patent",

note = "8310388",

}

TY - PAT

T1 - segmented analog-to-digital converter and method thereof

AU - Chang, Soon-Jyh

PY - 2012/6/21

Y1 - 2012/6/21

N2 - The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC).

AB - The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC).

M3 - Patent

M1 - 8310388

ER -

segmented analog-to-digital converter and method thereof

摘要

指紋

引用此