Self-calibrating clock distribution with scheduled skews

Hong Yean Hsieh, Wentai Liu, Mark Clements, Paul Franzon

研究成果: Conference article同行評審

4 引文 斯高帕斯(Scopus)


This paper presents a self-calibrating clock distribution scheme that dynamically compensates manufacturing and environmental variations to minimize unintentional clock skews and employs non-zero intentional skews to improve system performance. The tracking process is implemented with an all-digital phase-locked loop and has been verified through a prototype chip. Test results confirm the theoretical predictions that the absolute value of unintentional skew is limited to Δ, which is the resolution of the sampling and compensation circuitry.

頁(從 - 到)470-473
期刊Proceedings - IEEE International Symposium on Circuits and Systems
出版狀態Published - 1998
事件Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA
持續時間: 1998 5月 311998 6月 3

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程


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