Shallow trench isolation stress modification by optimal shallow trench isolation process for sub-65-nm low power complementary metal oxide semiconductor technology

Keyphrases

• Complementary Metal-oxide-semiconductor Technology 100%
• Shallow Trench Isolation 100%
• Stress Modification 100%
• Isolation Stress 100%
• Static Random Access Memory 25%
• Band-to-band Tunneling 18%
• Device Behavior 12%
• Boron Diffusion 6%
• P-well 6%
• Boron Dopant 6%
• Standby Current 6%
• Vccmin 6%
• Leakage Reduction 6%
• Device Mismatch 6%
• Channel Processes 6%
• Divot 6%
• Channel Dopant 6%
• Random Dopant Fluctuation 6%
• Memory Cell 6%
• Mismatch Current 6%
• Random Fluctuations 6%

Material Science

• Doping (Additives) 100%
• Complementary Metal-Oxide-Semiconductor Device 100%
• Mechanical Stress 66%
• Boron 66%
• Transistor 33%
• Metal-Oxide-Semiconductor Field-Effect Transistor 33%

Engineering

• Shallow Trench Isolation 100%
• Device Behavior 12%
• Random Fluctuation 6%
• Negative Metal Oxide Semiconductor 6%