Si-based tunnel field-effect transistors for low-power nano-electronics

A. S. Verhulst, W. G. Vandenberghe, D. Leonelli, R. Rooyackers, A. Vandooren, J. Zhuge, Kuo-Hsing Kao, B. Sorée, W. Magnus, M. V. Fischetti, G. Pourtois, C. Huyghebaert, R. Huang, Y. Wang, K. De Meyer, W. Dehaene, M. M. Heyns, G. Groeseneken

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)


Unlike MOSFETs, tunnel-FETs (TFETs) are not limited by a 60 mV/dec subthreshold swing and therefore scaling the supply voltage beyond the MOSFET's 1 V plateau becomes feasible. Supply voltage scaling is a necessary condition for reducing the power consumption per transistor, which enables further size scaling of the FETs. Designing a successful FET is however challenging, because it is not sufficient for the TFET to realize a sub-60 mV/dec subthreshold swing at one particular voltage. The next-generation FET must realize an average sub-60 mV/dec subthreshold swing over the whole supply voltage window, such that on-currents of about Ion = 100 μA/μm are achieved with I on/Ioff ratios of about 106 for sub 0.5 V supply voltages. Silicon-based TFETs are the most attractive because they allow for a full re-use of the existing expertise in fabricating silicon MOSFETs. However, the large bandgap of silicon (Si) results in low on-currents for the all-Si TFET and both input and output characteristics are inferior to the ones of all-Si MOSFETs.

主出版物標題69th Device Research Conference, DRC 2011 - Conference Digest
出版狀態Published - 2011 十二月 1
事件69th Device Research Conference, DRC 2011 - Santa Barbara, CA, United States
持續時間: 2011 六月 202011 六月 22


名字Device Research Conference - Conference Digest, DRC


Other69th Device Research Conference, DRC 2011
國家United States
城市Santa Barbara, CA

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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