Simulation of VMOS power transistors

Y. K. Fang, C. Y. Chang, C. H. Chen, B. D. Liu, Shui-Jinn Wang

研究成果: Article

2 引文 (Scopus)

摘要

The paper describes a new model for simulation of the current/voltage characteristics of VMOS power transistors. The model includes the conventional MOS theory modified by mobility reduction, non-uniform concentration distribution in the channel, and the effective resistance of the drain region. Experimental results are discussed. A comparison of experimental and theoretical results shows that the model accurately predicts the current/voltage characteristics of the device.

原文English
頁(從 - 到)331-337
頁數7
期刊International Journal of Electronics
56
發行號3
DOIs
出版狀態Published - 1984 一月 1

指紋

Current voltage characteristics
Power transistors

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此文

Fang, Y. K. ; Chang, C. Y. ; Chen, C. H. ; Liu, B. D. ; Wang, Shui-Jinn. / Simulation of VMOS power transistors. 於: International Journal of Electronics. 1984 ; 卷 56, 編號 3. 頁 331-337.
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Simulation of VMOS power transistors. / Fang, Y. K.; Chang, C. Y.; Chen, C. H.; Liu, B. D.; Wang, Shui-Jinn.

於: International Journal of Electronics, 卷 56, 編號 3, 01.01.1984, p. 331-337.

研究成果: Article

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