SINGLE PORT SRAM MEMORY CELL DRIVEN BY TWO WORD LINES IN ASYNCHRONOUS MANNER AND MEMORY EMPLOYING THE SAME

A memory cell driven by two word lines in an asynchronous manner and a memory composed thereof are provided. The memory has a hold mode, a read mode and a write mode. The memory cell includes a first write switch, a second write switch and a latch. The first write switch is electrically connected to a first word line and is turned on by a first turn-on signal transmitted by the first word line. The second write switch is electrically connected to a second word line and is turned on by a second turn-on signal transmitted by the second word line. When the memory is in the write mode, the second write switch is turned on by the second turn-on signal having a delay with respect to the first turn-on signal, thereby blocking the pseudo read of the unselected memory cell.