Slew-rate controlled output stages for switching DC-DC converters

Jia Ming Liu, Yi Cheng Huang, Yu Chun Ying, Tai Haur Kuo

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

Large supply bouncing due to the fast switching current and parasitic inductance of the supply rail may cause reliability and electromagnetic interference (EMI) problems, especially for ICs with the pulse-width modulation (PWM) technique, such as switching DC-DC converters. In this paper, a new slew-rate controlled (SRC) output stage is proposed to appropriately increase the rise and fall times of the PWM output by combining a feedback capacitor technique and a distributedand- weighted design. Therefore, the supply bouncing during PWM switching can be reduced. The SRC output stage is successfully integrated into a DC-DC converter implemented with a 0.35mm 1P4M 3.3V mixed-signal CMOS process for verification. With an input voltage of 3.3V, an output voltage of 1.8V, a switching frequency of 500 kHz, and a load current range of 700mA, the active area of the converter is 2.3mm2. With a merely 0.035mm2 control circuit for the SRC output stage, the measured supply bouncing of the designed converter can be reduced by 40% and thus the reliability and the EMI can be improved.

原文English
主出版物標題2011 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2011
DOIs
出版狀態Published - 2011
事件2011 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2011 - Kaohsiung, Taiwan
持續時間: 2011 5月 22011 5月 4

出版系列

名字2011 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2011

Other

Other2011 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2011
國家/地區Taiwan
城市Kaohsiung
期間11-05-0211-05-04

All Science Journal Classification (ASJC) codes

  • 硬體和架構
  • 電氣與電子工程

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