TY - JOUR
T1 - Spin coating high-k multicomponent (Al,Ti,V,Zr,Hf)Ox films with sub-nm EOT for MOS-based electronic devices
AU - Wang, Yu Chen
AU - Nguyen, Van Dung
AU - Chang, Kao Shuo
N1 - Publisher Copyright:
© 2024 The American Ceramic Society.
PY - 2024/9
Y1 - 2024/9
N2 - The facile spin coating fabrication of high-dielectric-constant (high-k) multicomponent (Al,Ti,V,Zr,Hf)Ox films with an equivalent oxide thickness of ≈0.95 nm and the investigation of their thermal stability and dielectric and electrical properties of the resulting advanced metal–oxide–semiconductor (MOS)-based electronic devices are reported in this study. Various heating conditions, including drying following spin coating, annealing after drying, and forming gas annealing, were investigated to optimize the quality of the films and reduce film defects. The favorable film-based MOS devices exhibited robust capacitance–voltage (C–V) and current–voltage (I–V) characteristics with a remarkable k value of approximately 62 at 1 kHz. The thermal stability of the films was affirmed through a rapid thermal annealing treatment at 900°C for 5 s and observation of nondegraded C–V and I–V curves. The electrical performance of the resulting MOS field-effect transistors (MOSFETs), including a threshold voltage of 0.4 V, an on/off ratio of 106, a saturated mobility of 40.1 cm2 V−1 s−1, and a subthreshold swing of 66.7 mV dec−1, was obtained. Moreover, hole- and electron-trapping measurements through negative and positive gate bias stress instabilities, respectively, indicate the reliable performance of our MOSFETs. Our results imply that solution-based processes are promising for fabricating fundamental semiconductor devices.
AB - The facile spin coating fabrication of high-dielectric-constant (high-k) multicomponent (Al,Ti,V,Zr,Hf)Ox films with an equivalent oxide thickness of ≈0.95 nm and the investigation of their thermal stability and dielectric and electrical properties of the resulting advanced metal–oxide–semiconductor (MOS)-based electronic devices are reported in this study. Various heating conditions, including drying following spin coating, annealing after drying, and forming gas annealing, were investigated to optimize the quality of the films and reduce film defects. The favorable film-based MOS devices exhibited robust capacitance–voltage (C–V) and current–voltage (I–V) characteristics with a remarkable k value of approximately 62 at 1 kHz. The thermal stability of the films was affirmed through a rapid thermal annealing treatment at 900°C for 5 s and observation of nondegraded C–V and I–V curves. The electrical performance of the resulting MOS field-effect transistors (MOSFETs), including a threshold voltage of 0.4 V, an on/off ratio of 106, a saturated mobility of 40.1 cm2 V−1 s−1, and a subthreshold swing of 66.7 mV dec−1, was obtained. Moreover, hole- and electron-trapping measurements through negative and positive gate bias stress instabilities, respectively, indicate the reliable performance of our MOSFETs. Our results imply that solution-based processes are promising for fabricating fundamental semiconductor devices.
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U2 - 10.1111/jace.19912
DO - 10.1111/jace.19912
M3 - Article
AN - SCOPUS:85193972407
SN - 0002-7820
VL - 107
SP - 6204
EP - 6214
JO - Journal of the American Ceramic Society
JF - Journal of the American Ceramic Society
IS - 9
ER -