State-transition-based incremental protocol specification

Chung Ming Huang, Ye In Chang, Duen Tay Huang

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

In this paper, we propose a verification method, which is called the reverse protocol verification, for incremental protocol specification. By analyzing the properties of logical errors, some candidate erroneous global states are generated. Then, each candidate global state is checked whether there is a path i.e., a global state sequence, connects to the original initial global state. If there is a path, then the candidate global state is really an erroneous global state and the incrementally specified protocol does have some logical errors. Otherwise, if there is no candidate global state or none of the candidate global state has a path, then the incrementally specified protocol is error free.

原文English
主出版物標題Proceedings - ACM Computer Science Conference
編輯Dawn Cizmar
發行者Publ by ACM
頁面30-37
頁數8
ISBN(列印)0897916344
出版狀態Published - 1994 一月 1
事件Proceedings of the 22nd Annual ACM Computer Science Conference - Phoenix, AZ, USA
持續時間: 1994 三月 81994 三月 10

出版系列

名字Proceedings - ACM Computer Science Conference

Other

OtherProceedings of the 22nd Annual ACM Computer Science Conference
城市Phoenix, AZ, USA
期間94-03-0894-03-10

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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  • 引用此

    Huang, C. M., Chang, Y. I., & Huang, D. T. (1994). State-transition-based incremental protocol specification. 於 D. Cizmar (編輯), Proceedings - ACM Computer Science Conference (頁 30-37). (Proceedings - ACM Computer Science Conference). Publ by ACM.