Symmetrical structure transient limiter for suppression of capacitor switching transients

Capacitor switching transients are harmful to the capacitor and the switching device. For reducing these transient phenomena, this paper proposes a symmetrical structure transient limiter (SSTL). The proposed SSTL can automatically provide high impedance at the instant of capacitor energization, and, thus, the switching transients can be effectively suppressed. After the restriction, owing to the compensation of all power losses caused by the diodes and reactors, the SSTL acts as a short circuit during the steady state and, thus, has no effect in the circuit. As a result, the capacitor voltage and current waveforms will not be distorted. Moreover, due to the freewheeling effect in the SSTL, no transient overvoltage will appear across the switch contacts at the instant of capacitor de-energization even though the reactors are inserted into the circuit. Theoretical analyses of the proposed SSTL for the energization state, steady state, and de-energization state have been completely carried out. Also, the selections of the related components are depicted. Finally, the experimental results obtained using different methods of capacitor switching verify the feasibility and performance of the proposed SSTL.