Synthesis of application-specific highly-efficient multi-mode systems for low-power applications

Lih-Yih Chiou, Swarup Bhunia, Kaushik Roy

研究成果: Conference article

5 引文 (Scopus)

摘要

We present a novel design methodology for synthesizing multiple configurations (or modes) into a single programmable system. Many DSP and multimedia applications require reconfigurability of a system along with efficiency in terms of power performance and area. FPGAs provide a reconfigurable platform, however, they are slower in speed with significantly higher power consumption than achievable by a customized ASIC. In this work, we have developed techniques to realize an efficient reconfigurable system for a set of user-specified configurations. A data flow graph transformation method coupled with efficient scheduling and allocation are used to automatically synthesize the system from its behavioral level specifications. Experimental results on several applications demonstrate that we can achieve about 60× power reduction on average with about 4× improvement in performance over corresponding FPGA implementations.

原文English
文章編號1253593
頁(從 - 到)96-101
頁數6
期刊Proceedings -Design, Automation and Test in Europe, DATE
DOIs
出版狀態Published - 2003 十二月 1
事件Design, Automation and Test in Europe Conference and Exhibition, DATE 2003 - Munich, Germany
持續時間: 2003 三月 32003 三月 7

指紋

Field programmable gate arrays (FPGA)
Data flow graphs
Application specific integrated circuits
Electric power utilization
Scheduling
Specifications

All Science Journal Classification (ASJC) codes

  • Engineering(all)

引用此文

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