TY - GEN
T1 - System level design of a spatio-temporal video resampling architecture
AU - Kuo, Chih Hung
AU - Chang, Li Chuan
AU - Liu, Zheng Wei
AU - Liu, Bin Da
PY - 2008
Y1 - 2008
N2 - To improve video quality in TV display, we propose an architecture including frame rate up-conversion (FRUC), spatial scaling, and adaptively edge sharpening. The technique of motion compensation is applied both to frame interpolation and to edge sharpening in order to improve visual quality. In conventional methods, the bi-directional motion estimation (ME) is usually employed between two successive frames to interpolate a new frame. The proposed method not only considers temporal correlation, but also exploits the spatial correlation to determine the covered and uncovered region. The weighting of edge sharpness is determined by the magnitude of motion vector (MV) and mean absolute difference (MAD) of the current block to improve image quality. We implement and verify our architecture on a virtual platform with system level design flow. Simulation results show that our method has better PSNR and image quality.
AB - To improve video quality in TV display, we propose an architecture including frame rate up-conversion (FRUC), spatial scaling, and adaptively edge sharpening. The technique of motion compensation is applied both to frame interpolation and to edge sharpening in order to improve visual quality. In conventional methods, the bi-directional motion estimation (ME) is usually employed between two successive frames to interpolate a new frame. The proposed method not only considers temporal correlation, but also exploits the spatial correlation to determine the covered and uncovered region. The weighting of edge sharpness is determined by the magnitude of motion vector (MV) and mean absolute difference (MAD) of the current block to improve image quality. We implement and verify our architecture on a virtual platform with system level design flow. Simulation results show that our method has better PSNR and image quality.
UR - http://www.scopus.com/inward/record.url?scp=51749097303&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51749097303&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2008.4542038
DO - 10.1109/ISCAS.2008.4542038
M3 - Conference contribution
AN - SCOPUS:51749097303
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 2797
EP - 2800
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -