System performance on dual CAN-bus network for avionics system applications

Chin E. Lin, Hung Ming Yen

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)


This paper presents prototype fabrication and verification on two different configurations of dual CAN (Controller Area Network) bus system. New circuit designs of bus selector and memory mapping technique are discussed with promotion from single bus system. With successful implementations, these two circuit systems are compared with system tests. The system CPU load using bus selector is much less than the memory mapping by software under close reliability and stability performance. Circuit board fabrication and test is verified and extended into PC controlled operation. Each node will be connected to real instruments or sensors, as well as several simulated signals. The dual bus IP board design is based on standard CAN communication stacks by firmware for different integration requirements. In system verification, a primary flight display suitable for small aircraft application for data exchange and control is constructed and tested.

頁(從 - 到)183-188
期刊Hangkong Taikong ji Minhang Xuekan/Journal of Aeronautics, Astronautics and Aviation
40 A
出版狀態Published - 2008 九月 1

All Science Journal Classification (ASJC) codes

  • 航空工程
  • 空間與行星科學


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