TY - JOUR
T1 - Systematic Analysis of Quadrature VCO with Capacitive Source Degeneration Coupling and Spontaneous Transconductance Matching Techniques
AU - Lee, Shuenn Yuh
AU - Chiu, Chun Jung
AU - Lee, Hao Yun
N1 - Funding Information:
Manuscript received March 2, 2018; revised June 13, 2018; accepted July 9, 2018. Date of publication August 1, 2018; date of current version March 26, 2019. This work was supported by the National Chip Implementation Center and the Ministry of Science and Technology, Taiwan, under Grant MOST 107-2218-E-006-034 and Grant MOST 107-2622-8-006-009-TE2. This brief was recommended by Associate Editor Y. Nishio. (Corresponding author: Shuenn-Yuh Lee.) The authors are with the Electrical Engineering Department, National Cheng Kung University, Tainan 70101, Taiwan (e-mail: ieesyl@mail.ncku.edu.tw).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2019/4
Y1 - 2019/4
N2 - This brief proposes a quadrature voltage-controlled oscillator (QVCO) using capacitive source degeneration coupling (CSDC) and spontaneous transconductance matching (STM) techniques. Mismatch in QVCO structure results in serious phase and gain errors. Thus, a CSDC structure is used to overcome phase error, and an STM structure is adopted to reduce gain error. Moreover, a systematic analysis of QVCO on the proposed techniques is presented to design a remarkable phase error of less than 0.1°. Measurement results reveal that the proposed QVCO has a phase error of 0.07° at 2.45 GHz. The measured phase noise is-121 dBc/Hz at 1 MHz offset and consumes 3.81 mW under a 1.8V supply voltage, which achieve a figure of merit of-182.98. The tuning range should be between 2.303 GHz and 2.475 GHz to fit the requirement of IEEE 802.15.4.
AB - This brief proposes a quadrature voltage-controlled oscillator (QVCO) using capacitive source degeneration coupling (CSDC) and spontaneous transconductance matching (STM) techniques. Mismatch in QVCO structure results in serious phase and gain errors. Thus, a CSDC structure is used to overcome phase error, and an STM structure is adopted to reduce gain error. Moreover, a systematic analysis of QVCO on the proposed techniques is presented to design a remarkable phase error of less than 0.1°. Measurement results reveal that the proposed QVCO has a phase error of 0.07° at 2.45 GHz. The measured phase noise is-121 dBc/Hz at 1 MHz offset and consumes 3.81 mW under a 1.8V supply voltage, which achieve a figure of merit of-182.98. The tuning range should be between 2.303 GHz and 2.475 GHz to fit the requirement of IEEE 802.15.4.
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U2 - 10.1109/TCSII.2018.2862150
DO - 10.1109/TCSII.2018.2862150
M3 - Article
AN - SCOPUS:85050971229
SN - 1549-7747
VL - 66
SP - 517
EP - 521
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 4
M1 - 8424026
ER -