Test Chips with Scan-Based Logic Arrays

Keyphrases

• Logic Block 100%
• Logic Arrays 100%
• Bridging Faults 50%
• Scan Chain 50%
• Diagnostic Procedures 25%
• Evaluation Results 25%
• Multiple Faults 25%
• Input Pattern 25%
• Chip Architecture 25%
• Diagnosability 25%
• No-fault 25%
• Scan Test 25%
• Stuck-at 25%
• Diagnostic Process 25%
• 2D Array 25%
• Single Fault 25%
• Testability 25%
• Defect Diagnosis 25%
• Double Fault 25%

Computer Science

• Scan Chain 100%
• Bridging Fault 100%
• Logic Array 100%
• Evaluation Result 50%
• Chip Architecture 50%

Engineering

• Bridging 100%
• Chip Architecture 50%
• Input Pattern 50%
• Testability 50%