Test integration for SOC supporting very low-cost testers

Chun Chuan Chi, Chih Yen Lo, Te Wen Ko, Cheng Wen Wu

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

To reduce test cost for SOC products, it is important to reduce the cost of testers. When using low-cost testers which have a limited test bandwidth to perform testing, Built-In-Self-Test (BIST) is necessary to reduce the data volume to be transmitted between the tester and the device-under-test (DUT). We enhance the SOC test integration tool, STEAC, so that it can support SOCs containing BISTed cores which are to be tested by low-cost testers. A test chip is implemented to verify the proposed technique. Experimental results show that the enhanced STEAC successfully works with the HOY wireless test system and other low-cost testers.

原文English
主出版物標題Proceedings of the 18th Asian Test Symposium, ATS 2009
頁面287-292
頁數6
DOIs
出版狀態Published - 2009 12月 1
事件18th Asian Test Symposium, ATS 2009 - Taichung, Taiwan
持續時間: 2009 11月 232009 11月 26

出版系列

名字Proceedings of the Asian Test Symposium
ISSN(列印)1081-7735

Other

Other18th Asian Test Symposium, ATS 2009
國家/地區Taiwan
城市Taichung
期間09-11-2309-11-26

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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