TG-based technique for NBTI degradation and leakage optimization

Chin Hung Lin, Ing-Chao Lin, Kuan Hui Li

研究成果: Conference contribution

7 引文 斯高帕斯(Scopus)

摘要

NBTI (Negative Bias Temperature Instability), which can degrade the switching speed of PMOS transistors, has become a major reliability challenge. Meanwhile, reducing leakage consumption has become major design goals. In this paper, we propose a novel transmission gate-based (TG) technique to minimize NBTI-induced degradation and leakage. This technique provides higher flexibility compared to the gate replacement technique. Simulation results show our proposed technique has up to 20X and 2.44X on average improvement on NBTI-induced degradation with comparable leakage power reduction. With a 19% area penalty, combining our technique and the gate replacement can reduce 19.39% of the total leakage power and 36.56% of the NBTI-induced circuit degradation.

原文English
主出版物標題IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
頁面133-138
頁數6
DOIs
出版狀態Published - 2011 九月 19
事件17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011 - Fukuoka, Japan
持續時間: 2011 八月 12011 八月 3

出版系列

名字Proceedings of the International Symposium on Low Power Electronics and Design
ISSN(列印)1533-4678

Other

Other17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
國家/地區Japan
城市Fukuoka
期間11-08-0111-08-03

All Science Journal Classification (ASJC) codes

  • 工程 (全部)

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