The direct evidence of substrate potential propagation in a gate-grounded NMOS

Dao Hong Yang, Jone F. Chen, Kuo Ming Wu, J. R. Shih, Jian Hsing Lee

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.

原文English
頁(從 - 到)728-731
頁數4
期刊Solid-State Electronics
54
發行號7
DOIs
出版狀態Published - 2010 7月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

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