摘要
We present a tile-based GPU design which is modeled in a full system simulation platform. The full system simulation platform includes a functional Linux-based system on which the GPU is incorporated for design explorations. To accurately estimate the execution time of the application graphics software, an execution time synchronization mechanism for the virtual platform is developed. We extend the Ericsson Texture Compression (ETC) scheme in our GPU to support alpha compression. In this way, we are able to reduce the external memory accesses to about one sixth, and speed up the rasterization engine (RE) by 35%. We also optimize the hardware-and-software data flow through the full system design platform and obtain significant improvements.
原文 | English |
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頁面 | 1327-1330 |
頁數 | 4 |
DOIs | |
出版狀態 | Published - 2012 9月 28 |
事件 | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of 持續時間: 2012 5月 20 → 2012 5月 23 |
Other
Other | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 |
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國家/地區 | Korea, Republic of |
城市 | Seoul |
期間 | 12-05-20 → 12-05-23 |
All Science Journal Classification (ASJC) codes
- 硬體和架構
- 電氣與電子工程