Two-dimensional inverse discrete cosine transform processor

貢獻的翻譯標題: Two-dimensional inverse discrete cosine transform processor

Jar-Ferr Yang (Inventor)

研究成果: Patent

摘要

A two-dimensional inverse discrete cosine transform (2-D IDCT) processor comprises cosine angle index generators, pipelined multipliers and a symmetrical kernel. The 2-D IDCT processor of the invention has a five-stage pipelined structure for carrying out a coefficient-by-coefficient 2-D IDCT algorithm and can be operated at a clock rate of more than 50 MHz to achieve a pixel rate of about 400 MHz.
原文English
專利號5636152
出版狀態Published - 1800

指紋

transform
pixel
rate
index

引用此文

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abstract = "A two-dimensional inverse discrete cosine transform (2-D IDCT) processor comprises cosine angle index generators, pipelined multipliers and a symmetrical kernel. The 2-D IDCT processor of the invention has a five-stage pipelined structure for carrying out a coefficient-by-coefficient 2-D IDCT algorithm and can be operated at a clock rate of more than 50 MHz to achieve a pixel rate of about 400 MHz.",
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N2 - A two-dimensional inverse discrete cosine transform (2-D IDCT) processor comprises cosine angle index generators, pipelined multipliers and a symmetrical kernel. The 2-D IDCT processor of the invention has a five-stage pipelined structure for carrying out a coefficient-by-coefficient 2-D IDCT algorithm and can be operated at a clock rate of more than 50 MHz to achieve a pixel rate of about 400 MHz.

AB - A two-dimensional inverse discrete cosine transform (2-D IDCT) processor comprises cosine angle index generators, pipelined multipliers and a symmetrical kernel. The 2-D IDCT processor of the invention has a five-stage pipelined structure for carrying out a coefficient-by-coefficient 2-D IDCT algorithm and can be operated at a clock rate of more than 50 MHz to achieve a pixel rate of about 400 MHz.

M3 - Patent

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ER -