TY - GEN
T1 - UpPipe
T2 - 60th ACM/IEEE Design Automation Conference, DAC 2023
AU - Chen, Liang Chi
AU - Ho, Chien Chung
AU - Chang, Yuan Hao
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - RNA sequence quantification is an important analysis method to measure transcript abundances. A key overhead in RNA-seq quantification is to map a set of RNA reads to multiple reference transcripts, i.e., transcriptome. Besides, the performance of RNA-seq quantification is strictly limited by the excessive amounts of data movement between CPU and memory, i.e., memory wall problem on the conventional architecture. As the first publicly commercial processing-in-memory (PIM) system, UPMEM DPU, is proposed, the PIM gradually becomes a promising solution to overcome the memory wall problem. DPUs show great potential to accelerate data-intensive workloads by minimizing off-chip data movement between CPU and memory. Thus, this paper aims to improve the performance of RNA-seq quantification by fully exploiting the strengths of DPU. To achieve that, we propose a novel DPU-aware pipeline design "UpPipe"built on the software layer to address the hardware constraints of DPU. To the best of our knowledge, this is the first work to enable pipeline management on the DPU system. The evaluation results demonstrate the feasibility of our proposed design and provide a comprehensive study on how to utilize the limited hardware resources of DPUs efficiently.
AB - RNA sequence quantification is an important analysis method to measure transcript abundances. A key overhead in RNA-seq quantification is to map a set of RNA reads to multiple reference transcripts, i.e., transcriptome. Besides, the performance of RNA-seq quantification is strictly limited by the excessive amounts of data movement between CPU and memory, i.e., memory wall problem on the conventional architecture. As the first publicly commercial processing-in-memory (PIM) system, UPMEM DPU, is proposed, the PIM gradually becomes a promising solution to overcome the memory wall problem. DPUs show great potential to accelerate data-intensive workloads by minimizing off-chip data movement between CPU and memory. Thus, this paper aims to improve the performance of RNA-seq quantification by fully exploiting the strengths of DPU. To achieve that, we propose a novel DPU-aware pipeline design "UpPipe"built on the software layer to address the hardware constraints of DPU. To the best of our knowledge, this is the first work to enable pipeline management on the DPU system. The evaluation results demonstrate the feasibility of our proposed design and provide a comprehensive study on how to utilize the limited hardware resources of DPUs efficiently.
UR - http://www.scopus.com/inward/record.url?scp=85173094549&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85173094549&partnerID=8YFLogxK
U2 - 10.1109/DAC56929.2023.10247915
DO - 10.1109/DAC56929.2023.10247915
M3 - Conference contribution
AN - SCOPUS:85173094549
T3 - Proceedings - Design Automation Conference
BT - 2023 60th ACM/IEEE Design Automation Conference, DAC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 9 July 2023 through 13 July 2023
ER -