A FPGA-based Platform and Debugging Tools for Many-core OpenRISC System

  • 林 俊瑋

學生論文: Master's Thesis

摘要

For most programmers the behavior of hardware level is like a black-box It usually brings difficulties in developing and debugging circuit designs Therefore this work proposes a FPGA-based platform for observing the signal or behavior of hardware while execution In this thesis the proposed platform is divided into 2 parts hardware and software parts In the software part we defined several APIs to manage many cores on hardware level and observe the signals while execution in real-time In the hardware part on FPGA development board we built a many-core system based on OpenRISC and used the mailbox method for communication among cores The data transmission between hardware and software is through an USB interface which is requested to follow our defined protocol called Baton protocol Although we temporarily used OpenRISC as CPU in our current platform the components of software and hardware parts (e g CPU memory and peripherals) could be replaced in demand as long as they followed our defined Baton protocol and Baton APIs The proposed platform and tools provide the flexibility and convenience for programmers in developing their circuit designs
獎項日期2016 八月 31
原文English
監督員Wen-Yu Su (Supervisor)

引用此

A FPGA-based Platform and Debugging Tools for Many-core OpenRISC System
俊瑋, 林. (Author). 2016 八月 31

學生論文: Master's Thesis