Reducing of contact resistivity by forming palladium silicide on p type Silicon-Germanium based S/D metal contact

論文翻譯標題: 利用矽化鈀降低 p型矽鍺源極/汲極接觸電阻率之探討
  • 匡 婷芬

學生論文: Master's Thesis


As continuous shrinking of critical dimension in modern MOSFET technology cause the S/D metal contact resistivity getting high it can directly affects the performance of the MOSFET device Therefore metal silicide become one of the main important role in MOSFET devices According to device shrink silicide face some problem and need to overcome we need finding new materials getting low sheet resistance thermal stability,forming silicide in low temperature low resistivity low schottky barrier high in heavy doping source and drain In this work choose the next candidate source/ drain germanium based palladium silicide and detect the question above Firstly use the four point probe instrument measure the annealed substrate which was insitu doped boron epi Si0 7Ge0 3 (50nm) on mono crystal Si(100) and get the best activation temperature at 700℃ palladium metal and titanium metal separately deposit with the different thickness 5nm 10nm and 15nm on this processed substrate Do two step rapid thermal annealing with different temperature to form metals silicide through four point probe get sheet resistance measurement result found thermal stable at 800℃~950℃ a little diffusion on 700℃ and palladium silicide activation on 200℃~400℃ also show thermal stable and out-diffusion phenomenon at 500℃ then use TLM method measure IV curve of all sample to detect the sample electrical properties we get the low resistivity 3 842E-05Ωcm2 at 700℃ of TiSi2 (20nm) and 5 616E-07 Ωcm2 at 400℃ of Pd2Si (15nm) XRD shows the phase forming and diffusion mechanism of silicide by AFM know the roughness of film silicide and get the information of segregation of film by TEM confirm forming silicide and know the silicide thickness
獎項日期2018 八月 30
監督員Wen-Shi Lee (Supervisor)